To test and evaluate our IP cores we have set up an evaluation program, which will give you access to our cores with minimum investment in time and cost. To make this possible we have designed special evaluation core versions for development boards from ALTERA, LATTICE and XILINX.
These evaluation designs have full functionality but are limited in three ways:
- For this version of the IP core design no support is provided by phone nor email by Sensor to Image but the cores provide a fully certified and documented functionality to the extent of an usable evaluation version
- The design remains the property of Sensor to Image referencing basic the specification from AIA and JIIA
- Each IP core has inbuilt time limited core functionality to around 30minutes. After 30 minutes the FPGA has to be reprogrammed to resume testing
To acknowledge these 3 facts the user needs to sign this contract.
For our GEV core technology we have today 3 evaluation platforms and a free evaluation reference design for them. To start working with a design, please download and complete the contract mentioned in the link above, scan and email it to email(at)sensor-to-image.de and we will send you a link for the selected hardware and supported tools as detailed below:
- ALTERA Quartus15.1, Cyclone4®, INK, camera reference design, 1GBit
- XILINX ISE14.7, Spartan6®, SP605, camera reference design, 1GBit
- XILINX Vivado2017.2, Artix7®, AC701, camera reference design, 1GBit
For our U3V core technology we have today one free platform based on LATTICE ECP3. To start working with this design, please download and complete the contract mentioned in the link above, scan and email it to email(at)sensor-to-image.de and we will send you the hard- as software and supported tools as detailed below:
- LATTICE Diamond 3.3, ECP3®, USB3 Audio/Video Bridging Solution, camera reference design. Either directly contact LATTICE or use for 6 weeks one of the kits we have in stock for evaluation. To use one of the S2I kits you need to agree as well to pay for full cost of kit transportation as a kit replacement, when we do not receive kit at all or with hardware malfunction after the loan period.
For our CXP core technology we have today no free platform jet, as there is no standard FPGA+CXP-PHY hardware around. If you need a CXP evaluation version, please go to our contact page and let us know your request. We can then find an evaluation mechanism that works for both parties.