To test and evaluate our IP cores we have set up an evaluation program, which will give you access to our cores with minimum investment in time and cost. To make this possible we have designed special evaluation core versions for development boards from ALTERA, LATTICE and XILINX.

These evaluation designs have full functionality but are limited in three ways:

  1. For this version of the IP core design no support is provided by phone nor email by Sensor to Image but the cores provide a fully certified and documented functionality to the extent of an usable evaluation version
  2. The design remains the property of Sensor to Image referencing basic the specification from AIA and JIIA
  3. Each IP core has inbuilt time limited core functionality to around 30minutes. After 30 minutes the FPGA has to be reprogrammed to resume testing

To acknowledge these 3 facts the user needs to sign this contract.

For our GEV core technology we have today 3 evaluation platforms and a free evaluation reference design for them. To start working with a design, please download and complete the contract mentioned in the link above, scan and email it to email(at) and we will send you a link for the selected hardware and supported tools as detailed below:

  • ALTERA Quartus15.1, Cyclone4®, INK, camera reference design, 1GBit
  • XILINX ISE14.7, Spartan6®, SP605, camera reference design, 1GBit
  • XILINX Vivado2017.2, Artix7®, AC701, camera reference design, 1GBit

For our U3V as CXP core technology we have today no free platform available, as for these use cases no 3rd party hardware is available. If you need a U3V or CXP evaluation version please have a look on the paid versions based on MVDK or go to our contact page and let us know your request. We can then find an evaluation mechanism that works for both parties.